Memory Request Optimizer
The Memory Request Optimizer™ is designed to reduce the latency of your memory subsystem. Then turn that reduction in latency into power savings or a performance improvements for your SoC.
The Memory Request Optimizer™ is an ideal example of how Performance-IP's patent pending Memory Tracker Technology™ can improve the efficiency of memory system components.
The Memory Request Optimizer™ will reduce the read latency of your memory sub-system, allowing you to recover lost system performance. Based on Performance-IP's patent-pending Memory Tracker Technology™, which allows the Memory Request Optimizer™ to operate at greater levels of efficiency. This greater efficiency produces large reductions in latency, which means greater reductions in power or larger increases in performance. The Memory Request Optimizer™ can also reduce the number of reads that reach the memory sub-system. Further improving the performance/watt of your design.
The Memory Request Optimizer™ is completely programmable, allowing customer's to dynamically tune the desired request optimization to best match their applications performance and power requirements.
Support for single or multiple clients allows the Memory Request Optimizer™ to reside at any level of a memory sub-system, making it ideally suited for today's multi-core or multi-client SoC designs.
- Memory Tracker Technology™
- Recover lost performance
- Fully programmable optimization
- Supports OCP, AXI3, and AXI4 bus protocols
- Reduces dynamic power consumption
- Implement larger voltage scaling
- Achieve faster timing closure
- Improve product yields